slice delay product in xilinx

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gnoble29

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Anyone can plz tell me what is the meaning of slice delay product??How to calculate slice delay product in Xilinx ?
 

Is it related to ping pong products? 0_o

Not sure what you are looking for, but if you want to know delays between the various elements in a slice etc, then do the following 3 things:

1 - download the datasheet for your particular fpga
2 - look under "CLB Switching Characteristics" in the datasheet you just downloaded
3 - run the command "speedprint" that is installed along with ISE. It should be at something like: <INSTALL_PATH>/ISE_DS/ISE/bin/lin/speedprint , or similar location for windoze.

For example, to get all sorts of info on delays for a spartan-6 SLX45 you would run:

speedprint xc6slx45 speedgrade 3

And you will notice that all the gibberish it spits out looks suspiciously much like the information in the datasheet I mentioned earlier. So you can use the datasheet to help interpret what all those symbols mean.

Now if all that does not answer your question, I'm afraid you'll have to explain what you mean with "slice delay product" because I never heard of that exact 3 word combination in Xilinx country...
 

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