Is there any way to control the slew rate of I/O buffers (assume a chain of inverters for simplicity) to bring it to a particular range across temperature variations?
The cheap and dirty way for slew rate control is a series
gate resistor on the final sink and source devices. That
scheme has variabilities from Rg, Cdg and Vdd. If you
want something super controlled you're probably talking
a closed loop, quasi-integrator type feedback with a
reference, and this is unlikely to support high speeds
well.
How "particular" your range is will determine how heroic
the measures..