slew control in cmos I/Os circuit

[rajesh13]

003_559.pdf

I want to know why & how slew contro is done (dI/dt) is done is cmos I/Os circuit. I am basically interested in active slew rate control techniques.

 

[yjkwon57]

Re: slew contron in cmos I/Os circuit

Hi rajesh

The current control of an output I/O cell is very important because of the large parasitic inductances and capacitances of the IC package and the PCB, which causes the voltage swing and affect the GND and all the circuits. In the IC package, the pad size, bonding wire, and configuration of the pins are relavant. These informations are usually provided by the packaging guys. The relavant information can be obtained from the PCB manufacturer. After obtaining all relavant information, the SPICE simulation is to be performed for the output I/O cells so as to determine the W/L of the transistors and meet the tolerance of the swing. There are many types of I/O cells already developed and used, which are organized in more than one stage for the effective control of the output currents.

Bye~~

 

[sunking]

Re: slew contron in cmos I/Os circuit

Yes. Many company has their own lib of I/O circuit which has be validated. They can select with the different function.

 

[rajesh13]

Re: slew contron in cmos I/Os circuit

Yes. Many company has their own lib of I/O circuit which has be validated. They can select with the different function.

Do you know some schemes in cmos I/Os.

 

[modern_analog]

Re: slew contron in cmos I/Os circuit

generally slew control is done by
a) slowing down the pre-driver
b) splitting the transistors into multiple smaller legs and delaying one with the other by putting R in the gate.

 

[rajesh13]

Re: slew contron in cmos I/Os circuit

generally slew control is done by
a) slowing down the pre-driver
b) splitting the transistors into multiple smaller legs and delaying one with the other by putting R in the gate.

Do you know about some PVT compensated techniques.

 

[yoho]

Take a look at the paper "CMOS output drivers with reduced ground bounce and EMI" by Deutschmann/Ostermann

www.chipidea.com/esscirc2003/presentations/esscirc/c30/003_559.pdf