slack paths, reduce it in design

[hossam abdo]

Dear all;

How to reduce the slack paths in design, what is the logic of thinking to reduce it.

Thanks in advance.

 

[shitansh]

do you mean snack path??

 

[jigs047]

Dear all;

How to reduce the slack paths in design, what is the logic of thinking to reduce it.

Thanks in advance.

do u mean slack?
it is of two types.....positive or negative.

suppose, setup slack is positive.means in your design there is no violation.if slack is negative, there is some violation.

 

[nishit-69]

can u pls elaborate in detail......!

 

[jigs047]

can u pls elaborate in detail......!

setup slack = Required time - arrival time

if slack is positive then required time is more than arrival time. so, data may be stable before active edge of clock. thus violation is reduced.

 

[Prashanthanilm]

Hi Hossam,

Did you go through the previous threads and all?.

I am not sure about the question asked.

Please refer the below threads;
https://www.edaboard.com/threads/18766/
https://www.edaboard.com/threads/27794/
https://www.edaboard.com/threads/28998/
https://www.edaboard.com/threads/116754/

Hope its useful!!

 

[rca]

I believed you mean how to reduce the negative slack, I means reduce the combinational logic between two memories element (flip flop).
Added pipeline is a solution.