Single Stage OTA with current mirror

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sze wen

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I am required to design a single stage op amp with specs:
power supply = 1.8V
power consumption <= 45 microW
Gain > 50 dB
UNity Gain bandwidth > 5 MHz
slew rate > 2.0 MV/sec
output swing from 0 to 1.8V
load capacitance could be 1pF

minimum input common mode suggested is 500mV

Wonder if it is achievable by design?
 
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Right. Your schematic consists of several 'building blocks'. The differential detector itself can be distilled down to a long-tail pair.
We can picture it as two class A amplifiers side-by-side.
The 'tail' is a plain resistor. Its Ω value had to be played with by experimentation.
Input A is a triangle wave, amplitude 100mV, riding 1 VDC.
Input B is an unchanging reference level.

 

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Different designers favor different approaches,
I got into things young and have always been
more of a visual / "gut" sort while it's not very
surprising that freshers or students favor the
math heavy approaches they've been taught.
"Gut" comes later, or somewhat, or not at all.

But math needs numbers and those, you (OP)
lack. You need gm (at sane operating points)
of the gain element and you need the Zout of
all parallel devices attached to the gain node,
and whatever gain can be had from the diff
stage / current mirror (often, not much besides
the differential-to-single-ended conversion).

When I started in this game there were many
old timers who would bag on simulation and
insist on derivations. At my first employer there
was this guy who taught a in house course
where he derived the h-parameter expression
of a 200-transistor op amp (he was famous for
his designs' elaborateness) starting from the
Bohr model of the hydrogen atom. Week after
week it went on.

You can go too far with the "mathing".
 

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Is there a universal design methodology.
 

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sze wen said:
Is there a universal design methodology.
Click to expand...
Look at internal schematics of op amps. Just examining the popular time-honored 741 op amp teaches us a lot. You can spot the long-tail pair accepting bias input signals. It's made from PNP transistors which is an inversion of your schematic in this thread. Principles are the same.
 

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so many design for different purposes.
 

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Work from the outside, in. Outside has your
"customer's care-abouts". Input common mode
range defines input stage; output stage drive
and protection defines output stage architecture.
You can capture, exercise and tweak in these
sections in isolation.

Then you are left with the "middle" single-ended
(or second differential, depending) gain block.
You don't have one of those. Just two drains
pushing / pulling on each other.

So for DC gain, look to those. What can you do
to increase gmin*Rout of the diff pair, and Rout
of the load mirror? That's pretty basic and you
should be allowed the joy of discovery.
 

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