single slope adc design

Hi,

I was wondering if anyone knew any good reference material covering the design of single slope (or multiple slope) ADCs.
I know the basic principal behind them and the blocks required, but I'd like some good material about the design of the blocks (slope generator etc.).

Cheers in advance.

There's lots of info out there, e.g.

https://pdfserv.maximintegrated.com/en/an/AN1041.pdf

**broken link removed**

If you're looking for specifics about the blocks, e.g., "slope generator" (I assume you mean RAMP generator), then search "Ramp generator". These are fundamental circuits.

Cheers Barry.

I'm pretty much Ok with that level of operation. I was looking for articles or books that go into detail about the design and layout for maximising the performance (enob etc) that I get out of the ADC. I haven't found very much in the way of that level of description, all the papers I've found (at IEEE etc.) talk about novel designs, most of them not even fabricated, and only at a block level. And I've searched for details on the individual blocks (comparator I'm fine with designing, and there's plenty out there), the ramp generator, not so much at that level that I've found.
We use analogue outputs on the cameras we make and I want to convince folk that there's merit in spending some of our budget developing ADCs, but I've never designed one in anger before so was hoping to find either a book or some other reference material which goes into detail about design for best performance.

An overview of integrating ADC topologies is e.g. given in the Analog Devices Data Conversion Handbook, Chapter 3 Data Converter Architectures. Their operation principle can be easily understood and the parameters can be derived by simple calculations, I think.

You'll notice that no new integrating ADC with some performance have been designed during the last 15 or 20 years. I think, due to there inherent linearity limitations (integration capacitor loss factor is the most serious one), they have been superseeded by sigma-delta designs in all high performance applications.

Cheers, FvM.
I've maybe been unclear as to what I was looking for, or maybe the stuff just isn't out there. I'm well versed in ADC topologies and there. I'm more looking for a real world description of designing on on an IC (for use in image sensors - single slope seems to be a good choice and still very commonly used). I don't have as much time to design one of these as I should, as it's more of a side project to demonstrate to the group that there's merit in spending resources in perusing the development of our own column level ADC for our sensors instead of multiplexing and buffering the analogue signals off chip and performing the conversion at much higher rates. I was hoping there was some material, such as a PhD thesis or something or even a book which talked about the development of these on chip, with advice on what parts are most sensitive, what elements/parameters are best to optimise for a certain spec (speed or bit-depth). I've not found anything remotely like this after a few days of searching. I guess such material doesn't exist.

Custom chip design is specialized and very expensive (well into 6 figures). Do you have the resources for that?

If so, you might look at some books on analog integrated circuit design such as one of these. I'm not familiar with them so can't make any specific recommendations.