How do you define simultaneous read and write? In AHB specification, HRDATA is shown to echo HWDATA at write cycle end. I won't consider this echo as simultaneous read write. Which AHB waveform do you expect for simultaneous read and write?
By simultaneous READ and WRITE it is being indicated that Master can issue a READ and a WRITE transaction in the same clock cycle.
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In AHB specification in the timing diagrams READ and WRITE waveforms are shown in the same diagram. From that it appears if it means simultaneous READ and WRITE is possible in AHB. Is that appearance correct?