Simulation does not start in Modelsim when using Xilinx IP-cores.

[Kevsh]

My project uses Xilinx IP cores. To use them, I compiled the unisim library using the files that are in the directory
"C:\Xilinx16\Vivado\2016.4\data\vhdl\src\unisims ".
Then I compiled the *_sim_netlist files.vhd that are in the project (I compiled them into the "work" library).
Next, I compiled the project files. Everything compiled without errors.
Next, I started the simulation, but it freezes at the moment "#Loading work.main_tb(behavioral)#1", that is, it simply does not start.
At the same time, no errors appear. I suspect this is because I compiled the IP cores into the "work" library.
After all, let's say if a component is located in the "abc" library and an IP core is added to it using the component declaration, then the compiler expects that the IP core will also be in the "abc" library, and not in the "work" library.
But then why are there no errors that the components are not found (no errors were given even when I initially forgot to compile the *_sim_netlist files.vhd)?

What could be the problem?

 

[kaz1]

My project uses Xilinx IP cores. To use them, I compiled the unisim library using the files that are in the directory
"C:\Xilinx16\Vivado\2016.4\data\vhdl\src\unisims ".
Then I compiled the *_sim_netlist files.vhd that are in the project (I compiled them into the "work" library).
Next, I compiled the project files. Everything compiled without errors.
Next, I started the simulation, but it freezes at the moment "#Loading work.main_tb(behavioral)#1", that is, it simply does not start.
At the same time, no errors appear. I suspect this is because I compiled the IP cores into the "work" library.
After all, let's say if a component is located in the "abc" library and an IP core is added to it using the component declaration, then the compiler expects that the IP core will also be in the "abc" library, and not in the "work" library.
But then why are there no errors that the components are not found (no errors were given even when I initially forgot to compile the *_sim_netlist files.vhd)?

What could be the problem?

In my work I used to:

(1) Once only in Vivado => tools => compile simulation libraries, choose modelsim and the target folder

(2) Add to file "modelsim.ini" the following mapping: unisim = C:/… above location

3) In modelsim compile manually or write tcl.
to compile your code and the ip sim_netlist.

Check if you have a local modelsim.ini as it will overwrite
the main ini located in modelsim area. You can delete local one and use the main one to avoid mistakes.

 

[dpaul]

@Kevsh
Remember that since you are using IP cores, it is not necessary that all files are compiled into the "work" library.

To debug this problem we need to have the exact project setup as you have. Else we can only guess and suggest.

 

[Kevsh]

In my work I used to:

(1) Once only in Vivado => tools => compile simulation libraries, choose modelsim and the target folder

(2) Add to file "modelsim.ini" the following mapping: unisim = C:/… above location

3) In modelsim compile manually or write tcl.
to compile your code and the ip sim_netlist.

Check if you have a local modelsim.ini as it will overwrite
the main ini located in modelsim area. You can delete local one and use the main one to avoid mistakes.

1) I tried to do this before compiling unisim in the way I described. I had 140 errors. Some files were compiled, some were not. So I decided to compile everything at once in Modelsim.
2) My project file is located in the same directory as the compiled unisim library. Modelsim sees it and my files, which use IP cores, compile without errors. That is, by and large, I did the same thing.
3) I compiled my files in Modelsim using the vcom command.

I found the main error - I tried to initialize an array of too large size. It is not clear why this situation has not been handled in any way in Modelsim and no warnings are issued.

However, there is still the question that I asked earlier. It's easier to explain with an example: I have a design A that uses component B. Initially, A and B were in the same library, so no libraries are connected in the design A. Over time, component B moved to another library. Because of this, design A no longer sees component B. Is there any way using the arguments of the vsim or vcom commands to specify that when using design A and searching for component B, the search is carried out in the library where component B is located? I read the documentation for Modelsim, it seems like the search should be carried out in the "work" library. But I compile component B into the "work" library and design A still doesn't see it.

 

[Kevsh]

I used the -L argument of the vsim command to explicitly specify the library into which I compiled B (previously I used "work", but now I tried to create a separate one anyway). Everything works! But why nothing worked with "work" remains a mystery to me.