This does not work however for simulations. What is the work around for this? I have attempted to "switch" between the assignments using a mux but have not found a working solution yet.
As it's nicely mentioned in Edaboard forum rules Only you know what "doesn't work" means... Please clarify.
Presumed the slave is also modelling an open drain output, you have to add a weak pull-up driver in the testbench. If the slave is not clearly driving '0' and 'Z' only, a resolution function may be needed to connect both ports.