ee01akk
Junior Member level 2
I am trying to simulate the op-amp schematic diagram for a 741 and plot a graph of Power Supply Rejection Ratio v frequency. It is defined as 20 *log( change in dc supply voltage/ change in input offset voltage). Does anyone know how to work this out on the Cadence/ PSpice simulator? Do the 2 differential input voltage sources need to be removed and set to ground in order to work out the offset?
I would be grateful for any advice you can give.
I would be grateful for any advice you can give.