Because the operation is not small-signal, traditional
noise analysis is likely unhelpful.
Your output jitter is likely to be dominated by things
other than intrinsic transistor / resistor noises. Even if
these devices have proper noise params for the transient
/ pnoise to work, they are trivial contributors relative to
input supply noise, ground bounce, PCB decoupling ringing,
intertrace and bondwire couplings.
Now if you can figure am input-referred noise amplitude
at the modulator input, the ramp slope will let you
transform that into a "time amplitude". I don't think I'd
bother with any more precise (as distinct from accurate)
simulation, given my experience above.