simulate the MDAC in pipeline ADC

[iamxo]

mdac pipeline

Well, guys, we usually see FFT results to evaluate the SHA performance. Then, how to evaluate the MDAC in pipeline ADC, i mean using simulation. Is there some way like FFT to deal with the MDAC output?

thank you..

 

[wave3x]

mdac pipleline

Hello iamxo,
Yes, you cannot run a Full-scale transient to verify MDAC SNDR, My suggestion is that you can do it in ADC top-level simulation, Just MDAC use circuit, all the others use verilog-a model.
Indeed, you just need to check your settling behavior, FFT results comes from it.

 

[iamxo]

how to simulate pipeline adc

If i can ensure the settling behavior of MDAC, then the fft result should not be bad, right?