[SOLVED] Simple code not working

always @ (posedge Clk_SYS or posedge Reset)
    if (Reset)
        Tx_mac_wa   <=0;  
    else if (Fifo_data_count>=Tx_Hwmark_pl)
        Tx_mac_wa   <=0;								//then...Tx_mac_wa  will  be  asserted  0  to  tell  user  application  to  hold  packet  transmitting./
    else if (Fifo_data_count<=Tx_Lwmark_pl)
        Tx_mac_wa   <=1;

always @ (posedge Clk_SYS or posedge Reset)
    if (Reset)
        begin 
        Tx_Hwmark_pl        <=0;
        Tx_Lwmark_pl        <=0;    
        end
    else
        begin 
        Tx_Hwmark_pl        <=Tx_Hwmark;
        Tx_Lwmark_pl        <=Tx_Lwmark;    
        end

always  @(posedge Reset or posedge Clk)
    if(Reset)
        RegOut      <=RegInit;
    else if (CWR_pulse && !CCSB && CA_reg[7:1] ==CA_reg_set[6:0])    ///Si writeEnable is set AND chipSlect is enabled AND CA_reg[7:1](Addr of external) ==CA_reg_set[6:0] (addr of internal)
        RegOut      <=CD_in_reg;             //update the register value

always  @(posedge Reset or posedge Clk)
    if(Reset)
        RegOut      <=RegInit;
    else
        RegOut		  <=RegInit;