Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Silvaco mosfet with high k gate stack

Status
Not open for further replies.

mujahed

Newbie level 6
Newbie level 6
Joined
Feb 5, 2014
Messages
11
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
83
Hi

I want to design a short channel mosfet but i have an error in silvaco
please help me
i think the error is because of this line:
"diffus time=10 temp=900 weto2 press=1.0"

this the specification of my device:

Total Oxide Thickness: 1.5 nm
Oxide is composed of three layers: SiO2/HfO/SiON from the bulk to the gate contact
Use poly for G/D/S/and B contacts
Bulk Doping: 1.5x1019 cm-3
Junction depth for both S and D: 36 nm
S/D Doping: 1019 to 1021 must be verified to give the best performance of the device
Extend the D/S regions to 3 nm with two lightly doped drain (LDD) regions of 1015 to 10
17 into the channel (so that the D/S width extends from 50 nm to at most 52 nm)

thanks

Code:
go athena

#
line x loc=0.0 spac=0.005 
line x loc=0.035 spac=0.002
line x loc=0.055 spac=0.002
line x loc=0.075 spac=0.001

#
line y loc=0.0 spac=0.0001 
line y loc=0.05 spac=0.001
line y loc=0.07 spac=0.001
line y loc=0.12 spac=0.005
#
init orientation=100 c.phos=1e14 space.mul=2

#pwell formation including masking off of the nwell
#
diffus time=5 temp=1000 dryo2 press=1.00 hcl=3
#
etch oxide thick=0.02
#
#P-well Implant
# 
implant boron dose=3e16 energy=100 pears 

#
diffus temp=750 time=5 weto2 hcl=3
#
#N-well implant not shown -
#
# welldrive starts here
diffus time=40 temp=1000 t.rate=4.000 dryo2 press=0.10 hcl=3
#
diffus time=180 temp=1200 nitro press=1
#
diffus time=80 temp=1200 t.rate=-4.444 nitro press=1
#
etch oxide all
#
#sacrificial "cleaning" oxide
diffus time=5 temp=1000 dryo2 press=1 hcl=3
#
etch oxide all
#
#gate oxide grown here:-
#diffus time=1 temp=925 dryo2 press=1.00 hcl=3

depo oxide thick=0.0005
depo material=hfo2 thick=0.0005
depo material=SiON thick=0.0005

#
# Extract a design parameter 
extract name="gateox" thickness oxide mat.occno=1 x.val=0.05

#
#vt adjust implant 
implant boron dose=9.5e17 energy=10 pearson 

#
depo poly thick=0.01 divi=10 
#
#from now on the situation is 2-D
#
etch poly left p1.x=0.055
etch material=SiON left p1.x=0.04
etch material=hfo2  left p1.x=0.04
etch oxide left p1.x=0.035

#
method fermi compress
#diffus  time=10 temp=900 weto2 press=1.0
#
implant phosphor dose=3.0e13 energy=20 pearson 
#
depo oxide thick=0.012 divisions=8
#
etch oxide dry thick=0.012
#
implant arsenic dose=5.0e15 energy=50 pearson 
#
method  fermi compress
diffuse time=3 temp=900 nitro press=1.0
#
depo oxide thick=0.001 divisions=8
etch oxide left p1.x=0.035

# pattern s/d contact metal
#etch material=SiON left p1.x=0.035
#etch material=hfo2  left p1.x=0.035
#etch oxide left p1.x=0.035
deposit poly thick=0.005 divi=2
etch poly right p1.x=0.02

# Extract design parameters

# extract final S/D Xj
#extract name="nxj" xj silicon mat.occno=1 x.val=0.1 junc.occno=1

# extract the N++ regions sheet resistance
#extract name="n++ sheet rho" sheet.res material="Silicon" mat.occno=1 x.val=0.05 region.occno=1

# extract the sheet rho under the spacer, of the LDD region
#extract name="ldd sheet rho" sheet.res material="Silicon" \
	mat.occno=1 x.val=0.3 region.occno=1

# extract the surface conc under the channel.
#extract name="chan surf conc" surf.conc impurity="Net Doping" \
	material="Silicon" mat.occno=1 x.val=0.45

# extract a curve of conductance versus bias.
#extract start material="Polysilicon" mat.occno=1 \
	bias=0.0 bias.step=0.2 bias.stop=2 x.val=0.45
#extract done name="sheet cond v bias" \
	curve(bias,1dn.conduct material="Silicon" mat.occno=1  region.occno=1)\
	outfile="extract.dat"

# extract the long chan Vt
#extract name="n1dvt" 1dvt ntype vb=0.0 qss=1e10 x.val=0.49


structure mirror right

electrode name=gate x=0.06 y=0.010
electrode name=source x=0.01
electrode name=drain x=0.14
electrode name=substrate backside

structure outfile=MOSFET.str

# plot the structure
tonyplot  MOSFET.str -set sheme1.set

############# Vt Test : Returns Vt, Beta and Theta ################
go atlas

# set material models
models cvt srh print 

contact name=gate n.poly
interface qf=3e10

method newton
solve init

# Bias the drain 
solve vdrain=0.1 

# Ramp the gate
log outf=mos1ex01_1.log master
solve vgate=0.2 vstep=0.1 vfinal=1.0 name=gate

save outf=mos1ex01_1.str

# plot results
tonyplot  mos1ex01_1.log -set mos1ex01_1_log.set

# extract device parameters
extract name="nvt" (xintercept(maxslope(curve(abs(v."gate"),abs(i."drain")))) \
	- abs(ave(v."drain"))/2.0)
extract name="nbeta" slope(maxslope(curve(abs(v."gate"),abs(i."drain")))) \
	* (1.0/abs(ave(v."drain")))
extract name="ntheta" ((max(abs(v."drain")) * $"nbeta")/max(abs(i."drain"))) \
	- (1.0 / (max(abs(v."gate")) - ($"nvt")))

quit
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top