Silicon carbide FETs best for Phase shift full bridge?

[treez]

Hi,
We all know how wonderful the PSFB is at running bags of current through the FET diode just prior to switch ON in order to give us nice ZVS…..but as you know there’s no free lunch here……..the very act can be a death-trap for those unaware……..because if a FET (perhaps during a transient or start up etc) suddenly switches high voltage onto that diode whilst its conducting, we get a very high reverse recovery incident and …bang!.....dead PSFB.
The PSFB is particularly vulnerable to this…more so than the plain Full Bridge…..as bags of web articles will tell us, I am sure you have seen them all.
The thing is, why aren’t silicon carbide FETs being touted for PSFB use?.......their internal diode has a very short reverse recovery time, so ideal for these nasty aspects of PSFB operation?

The RDSON is higher with Sic but often, if Vin is high, then the primary current isnt that high anyway.

I see Infineon offering up their CFD range of FETs to handle PSFB nasties……but why not have SiC instead, and really solve the issue?

 

[FvM]

RDSON is higher with Sic

Not at all. Qg and Eorss is considerable lower for SiC with same Rdson.

Consider that most vendors consolidated their 1200V SiC portfolio before starting 650V and 900V. But the offer is constantly growing. SiC devices are still more expensive than Si with comparable switching power.

 

[asdf44]

Hi,
We all know how wonderful the PSFB is at running bags of current through the FET diode just prior to switch ON in order to give us nice ZVS…..but as you know there’s no free lunch here……..the very act can be a death-trap for those unaware……..because if a FET (perhaps during a transient or start up etc) suddenly switches high voltage onto that diode whilst its conducting, we get a very high reverse recovery incident and …bang!.....dead PSFB.
The PSFB is particularly vulnerable to this…more so than the plain Full Bridge…..as bags of web articles will tell us, I am sure you have seen them all.
The thing is, why aren’t silicon carbide FETs being touted for PSFB use?.......their internal diode has a very short reverse recovery time, so ideal for these nasty aspects of PSFB operation?

The RDSON is higher with Sic but often, if Vin is high, then the primary current isnt that high anyway.

I see Infineon offering up their CFD range of FETs to handle PSFB nasties……but why not have SiC instead, and really solve the issue?

I don't understand how PSFB is more vulnerable than standard full bridge. What I think is you see articles say "watch out for RR!" because you might otherwise forget in a PSFB. I said exactly that in this thread and no one contradicted me:
https://www.edaboard.com/showthread.php?378926-Practical-Understanding-of-Reverse-Recovery&p=1624787

I don't know about silicon carbide but gan systems lists "ZVS Phase Shifted Full Bridge" in applications (admittedly alongside almost every other topology that exists):
https://gansystems.com/gan-transistors/gs66506t/

And Transphorm has a PSFB reference design using their gan fets:
https://www.transphormusa.com/en/do...-for-3-3kw-electric-vehicle-on-board-charger/

Transphorm's cascode configuration means standard silicon gate drives, I'd consider them along with SiC.

 

[mtwieg]

The PSFB topology isn't particularly vulnerable to reverse recovery. The devices themselves are where the vulnerability lies. PSFB topology is nice because, when operating in ZVS, those stressful conditions don't happen. If a FET is switched in a strange way, then that's the fault of the controller, not the PSFB itself...

As for wide bandgap semiconductors, they arguably make PSFB less relevant because their switching losses are much lower. So you could get the same performance using a hard switched topology, or stick with PSFB but operate at a much higher switching frequency, etc....

 

[Easy peasy]

IXYS - were - according to our testing - the most rugged for PSFB when you got into hard switching - we have not tested all SiC yest - but the bigger die parts handle it better than those size "optimised" for switching.

You need to guarantee ZVS in PSFB - or have adaptive gate drive that turns on the parts slower during hard switching ( usually lighter loads )

 

[treez]

You need to guarantee ZVS in PSFB - or have adaptive gate drive that turns on the parts slower during hard switching ( usually lighter loads )

Thanks, thats what i was fearing....and gauranteeing ZVS over all load range, and all transients, is going to be tricky.

 

[asdf44]

I haven't seen any PSFB design, demo or reference that fully ZVS's at no load. I think you have to be able to tolerate hard switching. If you use GAN or SiC its no problem.

This infineon talks about how the half bridge legs soft switch above 24% and 89% respectively (and generally discusses reverse recovery, psfb failure modes etc):
https://www.infineon.com/dgdl/Infin...N.pdf?fileId=5546d4625f96303e015fdaa8ad107208