matrixofdynamism
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An 8 bit signed number would represent values from -128 to 127 while a signed number using those same bits in binary that is, represents numbers from 0 to 255. It is possible to add and subtract signed as well as unsigned numbers in VHDL where the signed and unsigned types are basically vector of binary values. However, this is not possible with std_logic_vector.
I am wondering, what difference is make whether we implement operands as signed or unsigned in an ALU that shall carry out add, subtract, multiply, divide, and, or, xor, nor, not operations? Of course the ports of the ALU shall be std_logic_vector and an internally generated signal shall convert that value to signed or unsigned so arithmatic operations may be carried out on them.
I am wondering, what difference is make whether we implement operands as signed or unsigned in an ALU that shall carry out add, subtract, multiply, divide, and, or, xor, nor, not operations? Of course the ports of the ALU shall be std_logic_vector and an internally generated signal shall convert that value to signed or unsigned so arithmatic operations may be carried out on them.