Sigma Delta Modulator Topology

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SDgonzal

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Hi,

I am designing Sigma Delta Modulators from some specifications given (ENOB, sampling frequency, BW Input Signal, VDD, Input Signal voltage), but I have Problems choosing the best topology for each specifications. How can I choose a correct Sigma Delta topology (CIFF, CRFF, CIFB and CRFB) from a given specifications ? As far as I know the selection of a topology is related to the STF, which can show a peak or not, but how can I relate that to the specifications? Or which will be a correct procedure to set a topology from specifications?

Many thanks in advance,

SDgonzal
 

you will find several network for using in music , TV as Control circuits
 

Sorry but I dont understand your answer. What do you mean?
 

SDM is for shaping signal at low freequency and if you can find transfer function ,you will can control Pole-Zeroes position by take care inspection of each ones .
 

Usually the STF has a gain of one, at least in the frequency band you are interested. The topology was dictated by the NTF at least in my designs. Usually different topologies are tested taking the possible implementation into account. There were times we were forced to switch from one topology to another for ease of implementation.

BR Jerry
 
Hello Jerry,

The problem of this methodology to define the topology, is that in my algorithm I can not simulate the macromodel of the Modulator therefore I Need to relate somehow the specifications to the NTF or just base my selection of topology in terms of area neeed for instance. There is anyway to connect NTF and specifications?

Thanks in advance

BR

 

I am not entirely sure what you mean by:"In my algorithm I cannot simulate macro model of the modulator ".
I am designing Sigma Delta Modulators from some specifications given (ENOB, sampling frequency, BW Input Signal, VDD, Input Signal voltage)
Click to expand...
If you look at your specifications you have everything needed to map poles and zeros of the NTF. Over-sampling can be calculated from input signal and sampling frequency, the (quantization) "noise" flor is set with ENOB, which is all you need for a quick evaluation
 

Sorry to not explain really clear, Im working in an algorithm that designs a Delta Sigma modulator from transistor Level by using the specifications given by a user.

Now I understood your answer, I guess when you say "topologies are tested" you mean by using the Delta Sigma Toolbox from matlab, to analyze the NTF and from there choose the better topology solution.


Thank you Jerry,
BR
 

I would love to see what you come up with, please PM me if you have any sucess.

Best Luck Jerry
 

You may see the diagram in many of patents , but that is the old one such as cassette tape : input part , output part etc.
 

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