Shielding critical signals

[airr]

shielding of clock nets with vdd vss

if you are shielding a signal, is there a criteria to use either GND or VDD lines for shielding? or it doesnt matter?

I think wrt AC both GND/VDD will be same. So cross coupling effects will be only affected by AC.

Am I missing something?

 

[shitansh]

shielding of critical signals

In digital circuit for shielding one net1 you can use floting nets on both sides of net1 or you can use on both sides either vdd or gnd nets for shielding.

For more detail about shielding you can reffer any layout book.

hth

 

[deepak242003]

shielding for signals

sheildin is used for protecting from noise. and we use ground there which will provide low resistance path to ground to a noisy signal

 

[nschutten]

layout shielding

Generally speaking, if power supply decoupling is low impedance enough and broadband enough, then indeed VSS would be identical to VDD in terms of RF impedance. But any signal is referenced to ground, so by definition, ground should be the lowest noise signal (assuming low impedance). You never know about power supply lines unless specifically taking care of this in terms of noise.

 

[shitansh]

critical signal shielding to be closed?

hi,

In some company they are using floating nets for shielding in digital layout.

Can any one explain y?

 

[Jirik]

shielding of signals in layout

hi,

In some company they are using floating nets for shielding in digital layout.

Can any one explain y?

Do you know the effect of the Faraday cage? I think this is the same case.

 

[knreserve]

shielding of signals

Hi,

Based on my experience it is not necessarily to shield a net via VDD/GND wires. Sometimes you can shield a net with another net wire which helps functionally to strengthen the state of the original net with better noise immunity. F.e. imagine you have 2 inverters connected serially (buffer). So if you shield the input of the first inverter with a wire brought of the second inverter output, you will for sure increase the positive feedback coupling (though shield parasitic cap) and your buffer will have higher immunity to noise and lower input parasitic cap than you just shield the input and output using GND wires.

 

[gksivas]

shielding nets floating layout

Hi all,
Actually shielding is used to critical nets (analog) only to protect from noise.we don't use to shield noisy signals like clock (digital) because clock signal is high frequency net, if we shield that then speed will decreases for that net. so if there are critical and noisy signals near to each other then we should shield only critical signal.
signal should be shield by gnd nets, because if there is any disturbance (noise) occures from noisy signal then this gnd signals capture that noise and send to gnd, likethat they will protect critical signals.
but in some cases vdd signals also use as shielded signals.but i don't know that cases.if anybody knows please explain.
thankyou

 

[user1111]

I think Electronic Instrument Design by Fowler will help you.

 

[shitansh]

hi gkshivas,

you mean that we should not have to shield clk net? is it so

As i know it is the most important net in digital or analog design and if any noisy net is there then we may have to protect clk, right?

I am wrong then please give me right information.

thanks