Setting up EM port for high-frequency circuit

anh56789

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Hi everyone,

I’m designing an amplifier using 65nm CMOS technology at 30GHz, with a substrate stack-up as shown in the figure below (I can’t disclose the full substrate details due to an NDA). The substrate thickness is 700um. I need to run an EM simulation for the amplifier up to 60GHz to account for the second-order harmonic, but I’m encountering difficulties in setting up the EM simulation, particularly with selecting the appropriate port type. The documentation indicates that the distance between the (+) and (-) of a port should be smaller than lambda/10, which is 500um at 60GHz. Since my substrate thickness is 700um, I suspect that the implicit ground port might not be suitable for this simulation, but I’m unsure. I have a few questions and would appreciate your guidance:

  • If I use the implicit ground port, will ADS generate any warning messages in the EM log about this potential port size violation?
  • If I need to use an explicit ground port, what should I select as the reference point? I’m uncertain because I’m working with multiple transistor and capacitor models connected to the EM layout, which only includes interconnects and inductors. For a CPW transmission line, selecting the reference point seems straightforward (the nearby ground plane), but I’m unclear on how to define reference points for other devices.
Thank you in advance for your help!
 

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