set_dont_touch and Module Compiler

[homer2k1]

set_dont_touch on cell

I used Module Compiler to create some fast adders. How can I tell Design Compiler not to change them?

Say I have two instances of this module, adderInst1 and adderInst2. I've tried using "set_dont_touch adderInst1" which works for just one instance, but how do I use * to match every instance? I would rather embed the "set_dont_touch" command in the Verilog netlist for the adder itself. Is there a way to do this?

 

[shelby]

set_dont_touch

you can do:
set_dont_touch [get_cell adderInst*]

this cannot be embedded in the verilog netlist.

 

[homer2k1]

set_dont_touch design compiler

Thanks for your quick reply. I have another question. When I use set_dont_touch, I get some warnings like this:

Warning: Unable to resolve reference 'shiftReg' in 'foo'. (LINK-5)
Warning: Unable to resolve reference 'adder' in 'foo'. (LINK-5)
...
Warning: Design 'foo' has '8' unresolved references. For more detailed information, use the "link" command. (UID-341)


I don't get these warnings if I don't use the set_dont_touch command. The warnings seem to cause problems when I do floorplan next. Any suggestions for how to fix this?

 

[shelby]

when are you using set_dont_touch in your script? Try reading in all your design files (verilog, libs, etc) first and then linking them. After that apply the set_dont_touch in your script.

also i think the command should actually be this (get_cells is plural)
set_dont_touch [get_cells adderInst*]

 

[homer2k1]

Solved. My problem seemed to be a combination of script order (as you suggested) and unique names. For future reference:

I was using "set_dont_touch" too early, but even after moving it later in the script, I still ran into a problem during floorplanning involving unique names. Without the set_dont_touch command, the original "adder" module is uniquified such that adderInst1 is an instantiation of "adder_0" and adderInst2 is an instance of "adder_1". The problem is that after set_dont_touch, both adderInst1 and adderInst2 were instantiations of the same module called "adder_". I fixed this by following set_dont_touch with an explicit uniquify:

set_dont_touch [get_cells adderInst*]
uniquify -cell [get_cells adderInst*]

Thanks for your help!