Serie Voltage Regulator with NMOS as Pass device

[pelo]

internal voltage regulator nmos

Hi,

I am working on an on chip voltage regulator with a NMOS as pass device

Vcc = 3
Vreg = 1.6

I have seen a lot of LDO regulator with PMOS but not with NMOS, Why????

Can you help me to design this regulator?

 

[ericliu]

Considering the body effect of the NMOS, it is difficult to get Vreg=1.6 under the condition of Vcc=3.

 

[max0412]

There are a couple of IC's for NMOS.

LT3150 Vcc=0.9V min. This chip uses a integrated controller for a 1.4MHz Boost reg to devolop the gate drive for a high side N-FET.

heres thee data sheet.
https://www.linear.com/pc/downloadDocument.do?navId=H0,C1,C1003,C1040,C1130,P2254,D2281

 

[pelo]

Think you for your post!

If i use a NMOS as Pass device, how i can make the compensation of the system??

I would like to have ; PM = 60° & Fast response

How can i do that?

Do you know some solutions to resolve my design?!

For help, i use a Symmetrical OTA as error amplifier, 2 resistor and a Nmos
I want to have gain = 100db, PM = 60° (@ low current), Fast transient response, and low power consumtion

Thanks by advance!
regards!

 

[smartdream]

Think you for your post!

If i use a NMOS as Pass device, how i can make the compensation of the system??

I would like to have ; PM = 60° & Fast response

How can i do that?

Do you know some solutions to resolve my design?!

For help, i use a Symmetrical OTA as error amplifier, 2 resistor and a Nmos
I want to have gain = 100db, PM = 60° (@ low current), Fast transient response, and low power consumtion

Thanks by advance!

regards!

How about your MAX currrent load?

 

[pelo]

My max current load is 30mA

Can you help me with this???

 

[pelo]

Nobody can help me????

 

[Vamsi Mocherla]

Hey pelo,

Firstly you do not want to use the NMOS because of the drop-out voltage. People use PMOS because of the low drop-out. Drop-out also determines the efficiency of the series LDO.

For the Op-amp, you can use a 2-stage with the input stage being a folded/normal cascode. It will give you a gain of about 60~70 dB. You can use Cascode compensation inside. At the second stage you can have a Class AB drive for the NMOS drivers. You will have a better slew performance.

A max current of 30 mA is not a big deal, provided you can live with the dropout. Also, the size of the NMOS pass transistor can be reduced based on your dropout.

What is your output cap? Do you want to have a 0.1uF/1 uF/4.7 uF load? What is the ESR you are looking for? Try and read the datasheets of all the vendors of the discrete capacitors and chose the best available. This will determine your dominant pole and the your phase margin.

 

[pelo]

Hi Vamsi Mocherla

my problem is that i am designing an on chip LDO so a capacito less LDo (with internal compensation! ) I don't use External Capacitor, just internal one and the capacitor value must be very small.

Then, for the 2 stage Opamp you suggest me to design a Class AB drive, do you have some paper on class ab Drive?

Think so much for your help!