Hi,
Your schematic is incomplete (REF, power supply capacitors, OUT ... and more)
and wrong: power supply values
missing: exact ATMEGA32 type.
ICL7135_CLK needs to be generated else where.
I guess you want to AVR to do this.
If so: use an OCxx output. Then the AVR perifieral can generate the desired clock without processing power ( = hardware solution)
Use AVR_OC0 (or AVR_OC2) and connect it with ICL7135_CLK.
AND_OUT is used as gated clock for a counter.
Indeed, if you make the AVR generate the ICL7135_CLK, you may omit the AND gate.
But at first let´s go with the AND gate:
AND_OUT sends oupt pulses as long as the ADC is BUSY. The AVR needs to count these pulses.
The AVR contains 3 counter perifierals. Two for 8 bit values, one for 16 bit values.
Since the number of counts is expected to go above 256 (= 8 bit limit) I recommend to use the 16 bit counter.
The input for this counter is "T1".
--> thus conect AND_OUT to AVR_T1
ICL7135 is used to sync the AVR with the ICL measurement.
--> connect ICL7135_BUSY with AVR_INT0 (or AVR_INT1)
Software: (pseudo code)
MAIN:
* declare ADC_value as int16, volatile
* init ports
* init timer0 (or timer2) to generate the desired ICL7135 clock frequrency
* init timer1, clock source = T1, no prescaler
* init INT0 (or INT1): to generate an interrupt at the falling edge.
INT0_ISR:
* ADC_Value = TCNT1 - 10001
* clear TCNT1
* RETI
*****
That´s it basically.
Just use ADC_value in MAIN as you like
Klaus