Sensitivity list of a process in VHDL - exact function

[picko_again]

Sensitivity list

I know that this may be a common question, but I've searched for a similar one asked before and I could'nt find any,
The question is : What exactly is the function of the sensitivity list of a process in VHDL?? ... I know that a process with a sensitivity list will be run once during simulation and then halts until a signal in the sensitivity list changes.. but I've synthesized a simple piece of code with and without the process's sensitivity list and the result schematic is the same !! so I wanted to know what the sensitivity list changes at the circuit level..

 

[tariq786]

Sensitivity list

As far as i know, sensitivity does not change the hardware nor it infers a hardware. Its just a way to start evaluating a logic.

Hope it helps