Sending data from dev/mem using mmap to PL side

[dipin]

Hi,

i had a zynq 7000 series Soc in my board.
i am sending data from arm processor to PL side by opening "dev/mem"
(it can access the physical address of the device ).

this is my pl side :

the axi_accelerator using an axi_lite with an address range of "8000_0000 to BFFF_FFFF"
so using mmap, i will get a physical memory (lets say 81C0_000)

*ptr = mmap(NULL, page_size, PROT_READ|PROT_WRITE, MAP_SHARED,
mem_fd, page_addr);.

and assigned data to that ptr. In FPGA i am getting data and its working fine.

now my question is : How this input data which i assigned to a *ptr (which is a pointer to physical memory going to the ZYNQ PS)??
Is it because of the ptr to the physical memory belongs to zynq and zynq ps will get data ?
how can i track the data from arm side to all the way to PL (programmable logic).
the motive of my question is , i wanted to how it really goes to the FPGA side..(like register by register )
any help is really appreciated

thanks and regards