self-biased lan design help?

i am designing a low noise amplifier performanced for 1.9GHz.
should i use one or two resistors for the drain current?
if i choose one,how the other source lead be?
nice to you!

pls more detail about ur amplifier wih its datasheet pls
regards

Hi,

It depends on what your Vdd is and what Vds you want to bias your FET. The resistor at the drain basically drops the Vdd to the required Vds value. The R at the gate gives the required Vgs (negative) to attain the Ids you want.

You can find tutorial for this on the net.... or the AppCAD software from Agilent can even calculate the resistor values for you based on FET parameters....

the resistor i reffered to is connected with source lead derectly(RS) .
vdd=5v vds=2v ids=5mA.
i calculated the value is 110ohm,
so should i use a single resistor for 110ohm or a parrallel values of 22oohm.
and the capacitors(cs)?

In general, you are better off by putting several parts in electrical parallel at different physical directions which reduces the parasitic reactances.

how large value of the capacitors(Cs,pararrel) should i use?

The capacitors should be just large enough to do the job. This is because of the self resonant frequency problem. In general, their reactance at the operating frequency needs to be 1/10 the value of the resistor value or 1/gm of the transistor whichever is smaller. There are some second order effects taking place such as the effect on noise figure.

If this is your first try at amplifier design there are several things that can ruin the whole design. One is the self oscillation problem. another is the input and output matching networks.

You are best off for your first try to copy the example circuit of the transistor data sheet. The utility 2 port program in the AdLabPlus software set is good for testing the stability of potential designs. It is $40 US which is cheaper than the full fledged microwave simulator programs. It is available here http://www.weberconnect.de/adlabp2.htm

here is my datasheet----

! fhc40lg.s2p 12/96
! FHC40LG
! @2V-10mA
! 1GHZ 18GHZ 18
# GHZ S MA R 50
! S-parameter data
1.000 .980 -20.6 5.620 159.7 .017 75.8 .541 -17.8
2.000 .942 -40.7 5.401 140.7 .033 61.6 .523 -35.0
3.000 .887 -59.4 5.051 122.6 .045 49.5 .501 -51.2
4.000 .838 -76.9 4.685 105.8 .054 38.5 .480 -66.6
5.000 .786 -93.2 4.334 89.9 .060 28.5 .461 -81.3
6.000 .742 -108.3 3.984 74.9 .063 20.2 .448 -95.4
7.000 .705 -122.1 3.654 60.6 .063 12.9 .449 -108.9
8.000 .672 -133.7 3.340 47.6 .063 7.2 .463 -120.3
9.000 .651 -143.9 3.110 35.8 .062 3.2 .481 -130.1
10.000 .633 -153.9 2.954 23.7 .061 -0.2 .498 -138.8
11.000 .611 -164.1 2.786 11.8 .059 -2.9 .513 -147.6
12.000 .595 -174.8 2.641 0.0 .058 -5.1 .535 -157.0
13.000 .588 176.0 2.518 -11.6 .057 -6.7 .562 -165.3
14.000 .579 167.6 2.412 -23.0 .057 -7.9 .597 -172.8
15.000 .569 159.3 2.342 -34.6 .057 -10.1 .634 -179.7
16.000 .555 150.5 2.290 -46.6 .058 -12.9 .667 173.6
17.000 .536 140.3 2.272 -59.4 .059 -17.0 .697 166.4
18.000 .525 129.9 2.233 -72.6 .060 -22.4 .727 158.8
! Noise data 12/96
2 0.28 0.86 31.0 0.19
4 0.30 0.87 57.0 0.18
6 0.34 0.86 83.0 0.13
8 0.39 0.81 108.0 0.09
10 0.47 0.74 132.0 0.05
12 0.55 0.63 156.0 0.03
14 0.67 0.49 179.0 0.04
16 0.81 0.33 -158.0 0.07
18 1.00 0.13 -136.0 0.11

I looked up the data sheet on the web and calculated 1/gm to be about 33 ohms at your operating point. The capacitive reactance should be 3 ohms or so. A pF should do the job. At these low ranges of capacitance you can pick one of a few pF that has a self resonance frequency that is higher than the highest frequency that the transistor has gain. In your case that seems to be about 40 GHz.