Self-biased cascode RF power amplifier

Hi,
I am reading about Self-biased cascode RF power amplifier in the page: https://www.google.com.vn/patents/US6515547
The self-biased circuit is introduced but I can't figure out how it work.
Could anyone shed some light on this?

I really appreciate your help. Thanks.

Rb and Cb act as a low pass filter to provide a DC voltage from RF Signal.So this circuit is self biased.
3A25 point is almost filtered at RFpeak and 3A08 point is lower than this by Vgs2 so that supplied Vds voltage of M1.
But it's a critical design, that may be used for academical or educational purposes otherwise it seems to have quite potential unstability feature.Not practical..
Or it must be very carefully optimized..

Thank you,
I has been get stuck for a while and can't figure how the self-bias works.
I am wondering why the bottom end of Cb is connected to S1 not S2. How about if I connect it to S2?

Osawa_Odessa said:

Thank you,
I has been get stuck for a while and can't figure how the self-bias works.
I am wondering why the bottom end of Cb is connected to S1 not S2. How about if I connect it to S2?

Click to expand...

You can't connect to S2 because in this case you will shunt G2-S2 by this cap. and the circuit will loose its function.You should connect directly to the ground with a very well connection.
A small amount of resistive or inductive load throught the path will create some unstability problems.
Use this circuit as is..

Thank you, I just want to understand the circuit better.
This may be a personal question but can you tell me how would you analyse the circuit( configuration) if you want to understand comprehensively about it?
Do you analyse the circuit in two mode, small singal and then large signal? How the circuit work is not clear to me and I am thinking about how can I analyse it.

Any ideas?

Rb and Cb act as a low pass filter to provide a DC voltage from RF Signal.So this circuit is self biased.

Click to expand...

Output voltage at drain is RF signal. As you said Rb and Cb act as a low pass filter and therefore, the voltage at gate is a constant. This voltage will bias for M2.

.So this circuit is self biased.

Click to expand...

Thanks, I was confused why the configuration is called self-bias.

3A25 point is almost filtered at RFpeak and 3A08 point is lower than this by Vgs2 so that supplied Vds voltage of M1.

Click to expand...

Can you explain a bit about this? I can't figure out what did you mean by "3A25 point is almost filtered at RFpeak".
In the picture, M1 operates as common-source while M2 is common-gate, right? If M2 is common-gate then, Cb should be shorted at RF signal but that seems contradict with its function above (provide bias for the gate)?

Osawa_Odessa said:

Can you explain a bit about this? I can't figure out what did you mean by "3A25 point is almost filtered at RFpeak".
In the picture, M1 operates as common-source while M2 is common-gate, right? If M2 is common-gate then, Cb should be shorted at RF signal but that seems contradict with its function above (provide bias for the gate)?

Click to expand...

At the point 3A25,there is a DC voltage that is driven by RF output signal.Remember R-C time response with sinusoidal signal.!! (R-C time constant is too long compare to signal period)
If this point is almost considered being as DC voltage, so 3A25 can be tought that is connected to ground.So, gate of M2 is connected to ground.
If you summerize all these results, this circuit is a self biased Cascode amplifier, M1 acts as a common source amplifier, M2 acts as a common gate amplifier due to DC voltage at the gate.(DC sources are considered short circuited in AC signal theory )

Hi,
I have just seen this from the patent. :sad: It is same as what you said but there are some points that I don't understand.

FIG. 3a shows a self-biased cascode configuration. The bias for G2 3A06 is provided by the series connection of Rb 3A10 and Cb 3A20. The point between Rb and Cb, labeled as 3A25, is where G2 3A06 is tied. The DC voltage applied to G2 3A06 is thus the same as the DC voltage applied to D2 3A07 (at DC Cb is an open circuit, Rb has no current and thus no voltage drop, and all the voltage at D2 3A07 appears across Cb). The RF swing at D2 3A07 is thus attenuated by the low pass nature of the Rb−Cb 3A10−3A20 series connection. In power amplifier applications, it is desirable to have RF swing at G2. This enables having a larger signal swing at D2 without facing the breakdown voltage at G2−D2 3A06−3A07. As D2 3A07 increases, G2 3A06 also increases (with a smaller value, as set by Rb−Cb) and so does S2 3A08. In this way, the amount of voltage drop on each gate-drain in M1 and M2 can be balanced. The values of Rb and Cb can be chosen for optimum performance and signal swing before gate-drain breakdown occurs in either M1 or M2.

Such self-biased cascode configuration can also be viewed as a compound of transistor with one gate, one drain and one source. As is obvious, it does not require any additional bondpad to provide a supply voltage to G2.

It is noted that in the circuit of FIG. 3a, G2 follows the RF voltage of D2 in both the positive and negative swings about its DC value.

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1. " The RF swing at D2 3A07 is thus attenuated by the low pass nature of the Rb−Cb 3A10−3A20 series connection."
Is my explanation below correct?
In AC mode, gate of M2 is connected directly to ground, then part of output current ID2 will flow through Rb and therefore, the current flowing through the load will decrease. => Vout decreases.
2. "In power amplifier applications, it is desirable to have RF swing at G2. This enables having a larger signal swing at D2 without facing the breakdown voltage at G2−D2 3A06−3A07. As D2 3A07 increases, G2 3A06 also increases (with a smaller value, as set by Rb−Cb) and so does S2 3A08. In this way, the amount of voltage drop on each gate-drain in M1 and M2 can be balanced. The values of Rb and Cb can be chosen for optimum performance and signal swing before gate-drain breakdown occurs in either M1 or M2."

At steady state, there is no current flowing through Rb and therefore the voltage at G2 and D2 are always the same. But from this sentence:
"As D2 3A07 increases, G2 3A06 also increases (with a smaller value, as set by Rb−Cb) and so does S2 3A08."
I guess it is in transition time, right? As D2 increases, the capacitor is charged and its voltage also increases. But how do you know that S2 also increases?