See a vhdl integer variable wave with Questasim

[Binome]

Hi,
I've downloaded a design with a testbench where the main process has an integer variable. I'd like to see the different values of this variable during the simulation with Questa but I can't find it anywhere. Can someone tell me?
Thanks.

 

[FvM]

Don't know about Questasim, but VHDL variables are typically excluded in object selection of simulators for performance reasons. You may need to set a simulator option to override the default.

 

[Binome]

Don't know this option. If someone knows and want to help...

 

[FvM]

Why not copy the variable to a signal for simulation purposes?

 

[Binome]

I've thought about that but signals and variables are not the same: variables are updated instantly and signals are updated at the end of the clock step.

 

[CataM]

I've thought about that but signals and variables are not the same: variables are updated instantly and signals are updated at the end of the clock step.

You can then assign the variable to the signal at the end of the process i.e. just before the whole process is over.

 

[FvM]

Watching the variable update during process evaluation may be simply unsupported.