SD card multi block read

[pjmelect]

I have written a FAT32 based operating system for the PIC18F processor for a SD card in SPI mode. I need to transfer large blocks of data (1.2MB) in as short as time as is possible. I first of all implemented this using single block transfer and I then tried multi block transfer mode. However I found that there was very little difference between using single block mode and multi block mode.
My questions are, has anybody else tried using multi block reads and what improvement did you get, if my results are typical what is the point of multi block reads.

 

[filip.amator]

Try with different SD card (newer, faster) and use the card in the parallel(4bit) mode.

 

[FvM]

Read time differences are small and probably irrelevant compared to SPI throughput limitations. Write time differences however matters a lot.

 

[pjmelect]

Try with different SD card (newer, faster) and use the card in the parallel (4bit) mode.

I am using a 16GB card, and 4 bit mode would actually be slower, you would need a processor of at least 200 MHz for 4bit mode to be faster.

Read time differences are small and probably irrelevant compared to SPI throughput limitations. Write time differences however matters a lot.

From my calculations and measurements, the actual transfer time is about 1 second with the access time being about 0.8 seconds (300uS per block), with software overhead 1 or 2 hundred milliseconds. It is this access time that I had hoped that I could reduce by using multi block transfer mode, but I found little or no difference. I haven't tried multi block write yet but I expect it to make a large difference.

 

[KlausST]

Hi,

I am using a 16GB card, and 4 bit mode would actually be slower, you would need a processor of at least 200 MHz for 4bit mode to be faster.

Why this?
Without further explanation this makes no sense to me.

So what's your actual:
* SPI clock frequency
* block size
* average block read throughput
* average block write throughput
....?

Klaus

 

[pjmelect]

I am using a 16GB card, and 4 bit mode would actually be slower, you would need a processor of at least 200 MHz for 4bit mode to be faster.
Why this?
Without further explanation this makes no sense to me.

So what's your actual:
* SPI clock frequency
* block size
* average block read throughput
* average block write throughput
....?

Klaus

My processor has a hardware SPI interface with DMA, it takes 10 instruction cycles to read in a byte of data through the SPI interface amd store it in memory, as well as allowing the processor to do other things while doing so. If I were using a 4bit interface it would take 3 instruction cycles to read in each nibble, 3 instruction cycles to combine the nibbles and 4 instruction cycles to store the data and increment the pointer and check if the end of block has been reached, for a total of 12 instruction cycles. It only makes sense to use 4 bit mode on a fast processor where the time to transfer the data is much longer than the instruction cycle, or if the processor has built in suport for 4 bit SD interface.

 

[pjmelect]

Another funny thing that I have noticed is that I have read the CSD values for 5 different SD cards from different manufacturers and I have got the following values for the access time.

128MB access time 80mS
128MB access time 80mS
256MB access time 3.5mS
2GB access time 2mS
16GB access time 1mS

However when I measure the access time on all of the different SD cards with or with out multi block reads I get an access time of around 300uS which is a lot better than advertised. Has anyone else noticed this behaviour?