scan chain insertion

Hi all,

Scan chain insertion meant what?
We are adding any flipflops or any mux in the design ?
scan chain means what we are addind ?

Thanks.......

Hello,
Scan chain insertion is part of DFT in which we are making normal flip flops to scannable flip flops to make the design testable...
we are not adding anything just replacing normal flip flops to scannable flip flops...

Thanks....


scan flipflop means normal flip flop it having D,si,test clok,funtonal clock are giving with help of mux ?.
or scan flipflop mean it has si,so,test clok,funtonal clock pin ?

thanks

scan flip flop means scan_enable,si,d,clock,reset.....for clock its depends on the different different architecture...

Hi Manikanta, There are two stages in Scan Insertion. One, to replace the normal flops with their Scan-enable models and second one is Scan chain insertion, where we stitch the Scan-enabled FF in the form of a shift register in the Scan mode.

Coming to Scan-enable model, Normally we use MUXed scan model of Scan enable FF. We will usually have a lib cell for this model. If you are interested in knowing how this model is different from normal flop, here is the explanation : In the MUXed scan model, there will be a 2:1 MUX feeding to the Data-In of the normal flop. and the Inputs to this MUX will be Functional Data-In and other input would be a Serial Input fed from the previous Scan-enable flop in the scan chain. The select line for this MUX will be scan enable signal. If you want to know how the scan operates, you can dig up the threads in the same forum.