parkpika
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For the SAR ADC logic, the sequencer shifts 1 and 'sets' one of the code register to 1 each clock cycle.
The goal of this circuit is to clock in the control bus one FF at a time.
But how does the code register actually work? Instead of clocking in the D input, Q gets 'set' to 1 by the sequencer and its clock input is connected to the adjacent FF's Q.
The goal of this circuit is to clock in the control bus one FF at a time.
But how does the code register actually work? Instead of clocking in the D input, Q gets 'set' to 1 by the sequencer and its clock input is connected to the adjacent FF's Q.