Ceko_Boy said:Because I don't understand ASM language, so I tell you about watchdog.
Watchdog timer is a timer that sends out a pulse every consecutive time. the delay can be preset or determined by user.
Microcontroller will or device that sent this pulse notifies another device that "I'm alive and ok!". Eg, a device receive a watchdog pulse from a microcontroller every 1s. When the device didn't receive it, it sends out reset signal to the microcontroller. In this way, the system will never hang.
laktronics said:Hi,
A small correction regarding Watchdog Timer. It is a timer which has to be constantly triggered by the microcontroller at regular intervals to prevent it from producing an output pulse. If the controller fails to do it due its program losing control for some reason, the pulse output from the watchdog is used to reset the micro, thus ensuring that the micro recovers from its hanging state. It is a circuit that works like a watchdog on the proper working of the micro. You may or not, use it in your application.
Regards,
Laktronics
laktronics said:Hi,
Ok, you can add a watchdog to your design. This can be done using a retriggerable monoshot which will be triggered using a port pin of S52. In your software, you have to ensure that you do this triggering regularly within a fixed interval say 10 millisec. In that case you design a monoshot with a pulse width >10msec, say 15 msec. Whenever the mono output goes to zero due to failure of CPU to trigger it, generate a reset pulse for your CPU.
You can also implement a watchdog with a counter counting a clock input. In this case, use the CPU port pin to reset the counter at regular intervals and should the counter count and overflow at any time, use the overflow output to reset the CPU.
And to H_D_R, use an external address other than '000', reserved for RTC for addressing 24C02.
Regards,
Laktronics
"When reading or writing the time and date registers, secondary (user) buffers are used to prevent errors when the internal registers update. When reading the time and date registers, the user buffers are synchronized to the internal registers on any I2C START. The time information is read from these
secondary registers while the clock continues to run. This eliminates the need to re-read the registers in case the internal registers update during a read. The divider chain is reset whenever the seconds register is written. Write transfers occur on the I2C acknowledge from the DS1307. Once the divider chain is reset,
to avoid rollover issues, the remaining time and date registers must be written within one second."
Data transfer from a slave transmitter to a master receiver. The first byte (the slave address) is transmitted by the master. The slave then returns an acknowledge bit. This is followed by the slave transmitting a number of data bytes. The master returns an acknowledge bit after all received bytes other than the last byte. At the end of the last received byte, a “not acknowledge” is returned.
mcs51mc said:
mcs51mc said:I know it's C but with the free Keil C compiler you can compile it and get the ASM code from it
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