Routing microstrip on 4 layer board

Hi

I have recently designed my first 4 layer board. The outer two layers were used for routing and inner for a ground and power plane (5V DC (the design is purely digital)).

Stackup:

Top Layer
Ground Plane
VCC Plane
Bottom Plane

The board is of a high density thus I found it mandatory to route signal traces from the top routing layer (above the Ground layer) to the bottom layer.

Naturally on the top layer the characteristic impedance and intrinsic propagation delay can be calculated using the simple microstrip topology.

How can I calculate the characteristic impedance and intrinsic propagation delay for the traces on the bottom layer? The traces are at the same potential as the VCC plane when high. All of the data I have seen suggests the microstrip topology may only be used when the only thing between the trace and ground plane is the substrate.

These board have been fabbed and function perfectly well.

Any Suggestions?

VCC will be treated as ground plane.

Hi FvM,

How sure are you on this? Im receiving conflicting answers. I thought that the plane had to be the one on which the signal returned.

Thanks for your answer by the way!

I thought that the plane had to be the one on which the signal returned.

Click to expand...

That's a different point than that addressed in the original question. But it looks like using a ground plane as return for all signals isn't an option in your design In this case you'll usually want to chose the next best option. Presuming a sufficient number of bypass capacitors distributed over the plane with low inductance plane connection, VCC plane should be O.K.

You do a stack up that you put 5 mils prepreg between the ground and power plane. This forms a sheet of distributed capacitance between the power and ground. You have 0.01 bypass cap on every power pin of the ICs, that will AC couple the power and ground plane. The key is to make sure you have 0.01 cap spaced something like 1" apart to form a square grid. This will further couple the two planes together for lower frequencies. The placement of the big 10 uF tantalum cap is not criticle. With these, you pretty much stitch the two plane together and you can rely on the power plane being the ground reference.

Yes, you put 5 mils between the two planes will make the dielectric thickness from the trace to plane to be like 25mil or so, but it is not that bad. The important thing is to have a solid ground plane for the trace.