Routing in Silicon Ensemble

[pantic]

Hi
I want to do the global and final routing in my design. Silicon Ensemble routes with standard width 0.5 um but I want more. Does anybody know how can I do it?
Thanks

 

[khorram]

If you want to route your modules in a higher level, It's better to define your modules as a netlist (you just need to define inputs and outputs without functionality) in an editor. After importing the netlist, you will be able to do global routing of the defined modules.

Regards,
KH

 

[moorhuhn]

silicon ensemble uses rules described in "technology".lef. Simply look all LEFs which you read in. There is described e.g. the metal width, pitch, via rules. The rest has to be done in Silicon ensemble itself. So you need also a verilog netlist and the abstract blocks (LEF) for each primitive element used in your netlist.
I do not think silicon ensemble is a good tool for the global routing of the analog or mixed designs but it may be used for it. IC Craftsman might be probably better. Depends on the complexity of your design.