Routing for analog signals

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at89atbits

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I have a doubt as to which is a better way to route for analog signals
I have two options.
Either I'll have to route it on the bottom layer in which case it'll be under another analog signal in the same plane.
Or I can route it from in between two legs of an electrolytic capacitor.

What is the better option?
Or both will cause problems?
What would be the pros and cons for either of them?

 

Option 2 is always better. You can effectively isolate the analog route in Bottom layer from another analog route in the top layer by having a thicker dielectric material. On other hand, routing the trace in between the pins of Electrolytic cap is absolutely not correct.
 

The best option would be to look at your placement, change it slightly and get shorter signals and much better routing. Learn to optimise placement that is the most important skill in PCB design, then the routing just flows.
 

Hi,

i´d say it depends on the signals.

There is an unrouted wire, so it seems the signal of the electrolytic cap belongs (carries) about the same signal as the analog signal. If so, then i don´t see a problem routing the analog signal inbetween the cap´s legs.

But if the cap carries other signals, then for sure the second solution is better.

Even better marce´s solution.


Klaus
 

I agree with the above oppinions, however a proper knowledge of the circuit allow you to determine wether such care is really required. For instance, the resolution of the analog signal and even is these capacitors are been used as decoupling a bus containing power or logic devices.
 

Move the components marked 100 and 15uF below the component marked 0.05uF.
Rotate the component marked 15uF 90 degrees anti clockwise, re route the signals and you don't have to go
through the cap, around it or down to another layer.....
Good analogue design needs good placement, when I do analogue especially with op-amps I try to keep everything on one layer by using careful placement and looking at the rats nests as I move devices and work out in my head where the routes will go.
Without a schematic it is harder to comment on placement for this design, but at the moment it does not look optimal.
Some of the footprint look a little bit strange as well, especially if the 3 pin device is a SOT-23.
 

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