manasic
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hey friends;
I have to code a routing logic using train algorithm, in vhdl.
Details regarding the routing logic:
The 2-D mesh structure is span in form of tree, as shown in the figure**broken link removed**
The top is the root and addressed as 000, the branches below it are given address 100 and 200 respectively. and all the nodes are routing this technique.
I need following information, if someone has worked on it:
1. I want to see some standard design for router (with any routing logic say like X-Y routing) , especially regarding clock and reset.
2. If there is any reference of the design for NoC routing logic using train algorithm in VHDL.
Thanks
Manasi
I have to code a routing logic using train algorithm, in vhdl.
Details regarding the routing logic:
The 2-D mesh structure is span in form of tree, as shown in the figure**broken link removed**
The top is the root and addressed as 000, the branches below it are given address 100 and 200 respectively. and all the nodes are routing this technique.
I need following information, if someone has worked on it:
1. I want to see some standard design for router (with any routing logic say like X-Y routing) , especially regarding clock and reset.
2. If there is any reference of the design for NoC routing logic using train algorithm in VHDL.
Thanks
Manasi
Last edited: