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@rm7 tdmi (reverse design)

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whatever

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reverse design:
@rm7TDMI, schematic in cadence format
layout in 0.5um/0.35 cmos process (cadence format, too)

anybody intersted, pm me please.?
OR: 4bit,8bit,16bit mcu by reverse design...
 

scaring too.
 

Hi,Whatever,
Can you convert the @rm7TDMI schematic to VHDL description?
Thanks !
 

For ARM7 HDL core look (this project is only started...) h**p://w*w.opencores.org/cvsweb.shtml/sARM7TM/
 

I though nnARM is no longer exits in opencore, will the sARM7TM be able to survive?
 

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