Hello,
I have designed a ring oscillator using ams 0.35 tech. I added pads using IOLIBV5_4M library .The schematic simulation works only with net sets.
I have completed the layout with padframe and try to run lvs but i get errors with the pads . The errors are about devices mistmach - Schematic device pin -gndr5r! Device net -gnd! .In Layout - Device pin gnd5r! Device net gndr5r! . I have this problem with every power global supply lines - vdd5r! vdd5o!.....
The schematic simulation doesn't work without net sets but I can validate LVS but after post layout simulation using the extracted circuit, my circuit wont oscillate ! I use Assura , virtuoso .13.
Does anyone have any idea how to pass LVS and post layout simulation with pads ?