GitRaccon
Newbie level 4
Hi. For a few days now I've been trying to communicate two RFM69HW modules with each other and I've got a bit of a problem.
Generally, both modules are connected to one Nucleo board, to one SPI, with the CS pins used to select a given module. They have an antenna made of a piece of cable and are about 0.5m apart.
I've tried the LowPowerLab library, adapting it to STM32 (but im not using interrupt pin) and communication via SPI works, the configuration is uploaded, and the register reading indicates that it is being uploaded correctly. I'm watching communication on the analyzer.
I'm trying to transmit in a loop every 1s from module A to B and the problem is that at the first attempt to transmit (from power reset) the signal is first measured RSSI and its read value is 0xFF, and the transmission does not occur. The next attempt to transmit stops at the RSSI measurement which is never completed - the RssiDone bit still has the value 0.
When I turn off the RSSI measurement before transmitting the signal, it will be transmitted (I can see the transmission on RTL-SDR), so the transmission procedure itself seems to work correctly.
The situation is the same with data reception on the second module - the FIFONotEmpty bit still has the value 0 (of course the TX module then transmits with RSSI reading disabled).
I have the impression that with a certain BitRate and FDEV setting it worked and RSSI finished the measurement after a while, but I am currently unable to reproduce this. I also changed the modules to new ones to exclude damage to the RF stages.
I've looked through a dozen or so threads online but none of them address this issue. Do you have any ideas/tips?
Generally, both modules are connected to one Nucleo board, to one SPI, with the CS pins used to select a given module. They have an antenna made of a piece of cable and are about 0.5m apart.
I've tried the LowPowerLab library, adapting it to STM32 (but im not using interrupt pin) and communication via SPI works, the configuration is uploaded, and the register reading indicates that it is being uploaded correctly. I'm watching communication on the analyzer.
I'm trying to transmit in a loop every 1s from module A to B and the problem is that at the first attempt to transmit (from power reset) the signal is first measured RSSI and its read value is 0xFF, and the transmission does not occur. The next attempt to transmit stops at the RSSI measurement which is never completed - the RssiDone bit still has the value 0.
When I turn off the RSSI measurement before transmitting the signal, it will be transmitted (I can see the transmission on RTL-SDR), so the transmission procedure itself seems to work correctly.
The situation is the same with data reception on the second module - the FIFONotEmpty bit still has the value 0 (of course the TX module then transmits with RSSI reading disabled).
I have the impression that with a certain BitRate and FDEV setting it worked and RSSI finished the measurement after a while, but I am currently unable to reproduce this. I also changed the modules to new ones to exclude damage to the RF stages.
I've looked through a dozen or so threads online but none of them address this issue. Do you have any ideas/tips?
