RFID Passive tag:Rectifier Efficiency

Hi
i am studying rectifiers in rfid passive tags nowadays and i came across many confusing points . so could you please try to hep me out with it.
the first one being how is a rectifier able to rectify when the circuit is in cutoff region due to lack of biasing.
another thing is how to calculate pce output dc power upon input ac power isnt it?
i am trying to implement a paper wherein an efficiency of 50% is achieved but i am not even able to achieve 15%...
i calculated output power (Vavg*Iavg) from results browser and input power of the vsource (Vrms*Irms)... is this method ok?
Thanks
Madura

This is one of the tougher problems, without a low-VT device
you'll have a hard time even "booting up" the local reservoir
and with them, leak-back is a problem. You probably need a
synchronous rectifier, but that itself needs to be fed and
clocked. Probably two stages to this, a flea-power detector
that harvests just enough in subthreshold operation to then
hand it off to a larger, more efficient sync rect that also
provides its own gate power.

The achievable efficiency will depend a lot on device tuning
and, critically, the matching and Q of the front end. If you
can get it to "ring up" there's a lot more useful amplitude
and you might self-clock a sync rect. But them you'll be
removing energy, perhaps self-limiting, if you don't control
how much energy you scrape off every cycle.