RF Receiver High/Low linearity mode?

[yolande_yj]

I have ever seen the spec of a RF reciever IC, they provide High and Low linearity modes. The High linearity mode consumes more power to handle the in-band blockers. Has anyone seen this kind of design? How do they design it? Thanks.

 

[lakeoffire]

I think GSM and EDGE can be an example. EDGE has higher linearity requirement than GSM, due to the different modulation techniques used. In the design, I guess two sets of circuits are designed, with enabling signals to select either mode.

 

[Mazz]

That's a real typical design problem for the receivers, that can bring to complex solutions.
RF AGC can be one of this: while the RF part sense an high signal it decreases the gain and increase the linearity: details depend on implementation (for example you may need to change the current in LNA and/or the LNA load, or you may need to act on mixer too...and so on).
Could you share the datasheet you mention?
I hope it can help
Mazz

 

[cmosbjt]

Please refer to the book by JOY LASKAR:
"MODERN RECEIVER FRONT-ENDS - Systems, Circuits, and Integration"
**broken link removed**
"Gain switching functionality has been realized by a NMOS transistor pair, M1 and M2. When the control voltage is “low” or 0 V, both M1 and M2 are turned off, and the LNA functionality is governed by the bipolar transistors Q1 and Q2. This is referred to as the “high-gain” mode operation of the LNA. The low-gain mode occurs when the control voltage is at a “high” state, typically raised to the supply voltage of the circuit. In this case, both the transistors, M1 and M2 are turned on. M2 provides a bypassing path to the input RF signal, and M1 provides a short between the input and output terminals. This ensures very little current flow to the base of the transistor, Q2, thereby reducing the gain significantly. This is called gain switching, by which, with respect to a control voltage, one can switch between two gain stages."

Hope it helps.

 

[yolande_yj]

To Mazz:

Thanks alot, but how to change the mixer between High/Low linearity mode?
Sorry I can not post it here since the datasheet is from our partner company, it is confidential.

To CMOSBJT,

Thank you. It really helps me.

 

[Mazz]

Do you really need to do it?
If for example in high gain mode LNA has 20 dB of Gain and an OP1dB of 0 dBm, the input stage of the mixer should have an IP1dB > 0dBm that is maybe enough in low gain mode, if LNA gain is 0 dB, so receiver max signal can be close to 0 dBm. Just an example.
Anyway a solution can be a similar one proposed by CMOSBJT, with a switch that bypass the Gilbert cell transconductor, injecting current directly in the switching block (assuming that your mixer is a gilbert cell, of course).
The solution depends on required dynamic range of the receiver in high and low gain modes, i.e. in IIP3 and NF. Don't forget the input return loss...
I know, it's hard job...but amazing.
I hope it can help.
Mazz

 

[dsjomo]

I think the question is not for Low Gain Mode.

Typically, an LNA has 3 modes, 1) high gain high linearity mode, 2) high gain mid linearity mode, 3) low gain mode.

Simply adds the bias current and lower down the loading impedance, you'll get a better IIP3 and IP1dB(input compression point).

Low gain mode is also known as "Bypass Mode", normally it is realized by simply a mos switch. It almost consumes zero power if we turn off the high gain circuit while the low gain switch is turned on. The problem is that, the switch connects two different impedance, so the reflection coefficient must be large if we didn't do something like M2 in the above figure. Namely, M2 is for matching purpose. And it is the most difficult part to design low gain mode, while we cannot modify the I/O matching network on PCB, and the S11 and S22 should be still low enough when low gain mode is on. Besides, the output node is a high Q node, it varies a lot as a kind of process variation. So M2 has to compensate for that and slightly loads the input signal. And at last, you have to find the optimal input match for high gain, low gain, and high gain noise match. With proper design(under SiGe), these 3 point could be superpositioned onto the same impedance. I proposed a modified version of low gain mode in a paper but rejected by the RFIC 2005 conference...... . It seems RFIC conference gets to higher level every year.

Besides MOS switch, another method called current streering was popular. But it suffers lower linearity and high power consumption compared to MOS switch. But it brings the possibility to make a Variable Gain LNA. Thus relax the specification of VGA.

While we decided to switch to low gain mode, it means that the input signal is large enough and possiblly the LNA would saturate mixer. So the intermodulation and noise is not the main problem, the main problem is mixer's IP1dB. If you have a incredible high IP1dB mixer, then you don't need the low gain mode.

Added after 22 minutes:

More, the high linearity and mid linearity are not meant to be swapped while the LNA is operating, because you never know when is the time you need a better IIP3 because there is no way to measure how much power are there in the adjecent channels.

And more, the low gain mode can't help you to withstand the IN-BAND BLOCKER. The special case is when wanted signal is very low and in-band blocker is very high. Because the wanted signal is small so we are still in high gain operation, so the in-band blocker is amplified by LNA and may still saturate mixer. Therefore to totally get rid of in-band blocker, the ultima solution is to modified the IP1dB of mixer.

The aboves point out the same thing that --- we are not able to sense the power in adj. channel because our AGC loop only estimate the power of wanted signal.

 

[cmosbjt]

Hi dsjomo,
I am sorry to hear that your paper was rejected. But I still believe you are an expert in this area. Can you recommend some papers or reading materials about this topic? Thank you.

 

[dsjomo]

umm...... Actually there are not so many papers talking about low gain mode in LNA design area.

The 1st paper I read which talks about low gain mode is the following one:

A wide dynamic range switched-LNA in SiGe BiCMOS
Nakatani, T.; Itoh, J.; Imanishi, I.; Ishikawa, O.;
Microwave Symposium Digest, 2001 IEEE MTT-S International , Volume: 1 , 20-25 May 2001
Pages:281 - 284 vol.1

I'm sure that you can find it on IEEE XPLOER. The the above paper is recommanded by myself.

Search "Low gain" and "LNA" on IEEE Xploer, you'll find some.