StoppTidigare
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www.icsl.ucla.edu/aagroup/pdf_files/dir-con.pdf
Hi elektrodians, since I've haven't so much to do at work
I've decided to start a project (5GHz CMOS tranceiver-chip) with a university far away from here.It's a project that I'll do just to learn, and I do it for free, no strings attached...Its just for fun.
The guy who I am having a contact with, suggests a testability project. A built in test that is enabled by the dsp. The test would focus on the RF-front end, and he suggests a simulink/matlab systemsimulation before starting up the design of the RF-parts.
Quote:"The architecture should be integrable such as zero-IF or low-IF so that off chip filters can be avoided"
(??? Don't know what integrable means !)
The tranceiver should be generic so that it can be used for an arbitrary protocol: bluetooth, 801.11b,or whatever
Questions:
i. What kind of tests do I want to do with the help of a DSP ?
My idea is to check if the PLL can lock on each frequency now and then.
Then you might also want to use A/D converter of DSP, to check for SWR somehow (Can it be done on chip ?)
ii. How should the architecture look like approximately ?
(For instance should it be a double conversion system ? Do I need several PLL, because of the frequency hopping ?)
iii. At which abstraction level should the system-simulation be done at ?
I've seen a tutorial on Eagleware's Spectrasys and understand that more or less that I can make rather big blocks of systemcomponents.
Will I be able to model frequency hopping
iv. How does Simulink work, I don't acess it yet, do I have have the Laplacian transfer function when I specify a subsystem, like for instance a filter ?
Kindest regards,
StoppTidigare
Hi elektrodians, since I've haven't so much to do at work
I've decided to start a project (5GHz CMOS tranceiver-chip) with a university far away from here.It's a project that I'll do just to learn, and I do it for free, no strings attached...Its just for fun.
The guy who I am having a contact with, suggests a testability project. A built in test that is enabled by the dsp. The test would focus on the RF-front end, and he suggests a simulink/matlab systemsimulation before starting up the design of the RF-parts.
Quote:"The architecture should be integrable such as zero-IF or low-IF so that off chip filters can be avoided"
(??? Don't know what integrable means !)
The tranceiver should be generic so that it can be used for an arbitrary protocol: bluetooth, 801.11b,or whatever
Questions:
i. What kind of tests do I want to do with the help of a DSP ?
My idea is to check if the PLL can lock on each frequency now and then.
Then you might also want to use A/D converter of DSP, to check for SWR somehow (Can it be done on chip ?)
ii. How should the architecture look like approximately ?
(For instance should it be a double conversion system ? Do I need several PLL, because of the frequency hopping ?)
iii. At which abstraction level should the system-simulation be done at ?
I've seen a tutorial on Eagleware's Spectrasys and understand that more or less that I can make rather big blocks of systemcomponents.
Will I be able to model frequency hopping
iv. How does Simulink work, I don't acess it yet, do I have have the Laplacian transfer function when I specify a subsystem, like for instance a filter ?
Kindest regards,
StoppTidigare