Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

[REQ] Signed serial divider in VHDL

Status
Not open for further replies.

cube007

Full Member level 6
Full Member level 6
Joined
Mar 12, 2002
Messages
385
Helped
16
Reputation
32
Reaction score
5
Trophy points
1,298
Location
Australia
Activity points
3,477
serial divider vhdl

Hello,

After searching the forum and using google I’m not very happy with the results. I need a serial synthesizable divider in VHDL. The width of the numerator and denominator should be adjustable separately. The numerator must be a signed value - the dominator not.

Currently I’m using the LPM_DIVIDE IP from Altera but this one is using too much space so a serial divider would be a solution moreover there’s enough time for a serial calculation.

All I found in the web were serial dividers for unsigned values. Isn’t it possible to do a serial calculation with signed values?


Bye,
cube007
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top