replacing an ideal tail current in a differential pair

[salma shabayek]

replacing a differential

Dear all,
I'm having a trouble in replacing the ideal tail current in the differential pair with an nmos current sourc transistors mirrored to an nmos diode connected transistor.
I did so by placing the nmos transistor with double the size of the nmos input transistor but I dont get amplification.
before placing the tail current I had large gain but now I dont..
so please if anyone knows what's the problem please tell me.

I also have another question ; since I'm working with 1uA current per branch and from using the current density charts and gm/id curves in Spectre I always get (W/L) ratio< 1

Is that acceptable???
thank you alooooooottttttttttttt

 

[PaloAlto]

common mode tail current

The input common mode level is 200mV. If you look at the common node of the input diff pair when using the ideal source, it was probably below zero volts. Now your real current source is cut so you don't get the current. You need your input common to be in the order of 1V at least

good luck

 

[vaibhavar]

Hi,
I completely agree with PaloAlto. The dc bias voltage given by u is not able to operate the input transistor in saturation when using current mirror (it will be in cut-off). You need to increase Vdc to get proper circuit operation.
Regarding your next question, the ratio (W/L) will be < 1, for such less current and small Vdd. (I assume its 0.13u technology, with [Un * Cox] = 520e-6 approx.)

I hope this clears your confusion. let me know if there are any new doubts.


Good luck
Vaibhav

 

[salma shabayek]

Than you alooott....
but there is one thing not yet clear.. im using 0.13u technology yes with vdd=1.2v
and while using the gm/id method to size the transistors i get W/L < 1..is that acceptable??
will it keep the transistors in saturation or will it move them to linear??
Thanks aloot guysss

 

[sutapanaki]

You are asking about your W/L ratio and gm/Id sizing but you don't mention what was the overdrive voltage you were targeting or equivalently 2/(gm/Id). There is no general answer based on just the size of transistors. Plus, even if you transistor size is correct, giving you the right Vov for the current your drain voltage can put the transistor out of saturation. In your case you have a fully-differential amplifier but you don't have a common mode control for the output. A mismatch (which you'll have) between the PMOS and NMOS currents will destroy your biasing - either the NMOS or the PMOS will be out of saturation. So even if you fix the input common mode issue you will need to spare some time to design the output common-mode control.