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regulator noise - how to make the bandgap output stable?

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sillier

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regulator noise

I have use bandgap output as the reference of the regulator.
When the regulator is sinking larege current, there will be voltage drop at power net. This affect the output of bandgap, then large variation is seen from the regulator output.

How can I make the bandgap output stable?

PS: If you said the PSRR of bandgap is not engouh , I think it is impossible. The main reason is that large current make the power net drop, and then it take long time for bandgap to recover to its normal voltage. If the sink current is cycle, bandgap output will never recover.
 

Re: regulator noise

sillier said:
How can I make the bandgap output stable?
- by not sinking large output current (Gate(s) input(s) only)
or
- by providing low output impedance (buffer) and stable power supply
 

regulator noise

1st, you have make sure the power bus is strong enough to supply large current loading, this could ensue the power of bandgap is higher enough for ouput the ideal value you wanted. 2nd, you need optimize your bandgap circuit, it coud work well with lower power.

Added after 2 minutes:

3rd, you need optimize your regulator circuit, increase the size of output P/N mos, this would reduce the effact to power .
 

Re: regulator noise

1. The power net width is fixed now.
I am confused that high frequency noise of power will effect the bandgap output. Maybe it is phase margin issue.

2. I does redesigned the bandgap. But I am not sure the new bandgap will work when the power voltage vary.
What kind of simulation should be run to ensure this? PSRR or trans simulation with power noise?

3. I am not agree with you. If PMOS size is large, when the regulator output drop, there will be larger current flow from power net and pass PMOS to regulator output. Power noise will be larger.
 

Re: regulator noise

I am glad to you fix the power bus width.
1) the phase margin not effect the high frequence noise, if the phase margin is not large enough, the bandgap output would osc.., and if you worry about the power noise, you need run the PSRR, and addd coupling cap and filter resistor and cap to reduce the bandgap output ripple.

2) you need take the power bus IR drop into you design, you have to ensure the bandgap power have enough power margin. and you could sweep the power, and check the lowest power with which the bandgap could work well.

3) the power noise would effect the regulator output, it is true, there is no way to reduce it. But you could add large (very large) bypass and coupling cap at power bus and regulator output.

good luck.
 

    sillier

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regulator noise

I agree with Areky_qin.
What kind of power source are you using? Generally, IR drop should not been serious in a not bad PCB or IC layout. If its simulation case, there is even no IR drop.
However, if you regulator load step frequently, impedance by parastic inductor may be serious on you PCB, so a good PCB layout is important in power system.

Reguards.
 

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