To the simulator, as long as vdsat=Vgs-Vth<0, they will flag the MOS as operating in region 3, and defines it as the sub-threshold region. It's stupid.
In reality, the region of vdsat<0 actually comprises of the week inversion region (sub-threshold), and part of the moderate inversion region.
In the weak inversion region, the I-V is exponential.
In the strong inversion region, the I-V follows the square law.
In the moderate inversion region serves as the transition region between the 2 above.
I'll bet you have very large aspect ratios for the cascode, which can push it into moderate inversion, to the extent of negative vdsat.
However, the cascode still works. It's normal. What you have to check is if the moderate inversion region is well-modeled by your model files. Otherwise what you simulate may not correlate with the actual silicon.