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Regarding Sample & Hold

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coolstuff07

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Dear,

Iam designing differential sample & Hold amplifier for 14-bit pipelined ADC with sampling speed of 150Msps. If i consider coherent sampling method for sample & Hold circuit also. How many samples i should consider for one cycle input signal during dft analysis.

Bye.
 

You should consider 2power14 (16384) samples.
What kind of opamp are you going to use and what is the supply voltage ?
 

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