regarding 1.5 bit/stage pipeline adc

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santhuee

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I am trying to design a 8 bit pipeline adc(1.5 bits/stage)
speed is 120 ms/s

what is the digital circuit in this pipeline adc?
is it a adder or a latch?
 

do you have any literature, i am trying to implement it in cadence. the whole adc should drive a 50ohm resistor where should the 50 ohm resistor connected
 

I don't think the ADC should drive a 50ohm resistor. Maybe, you mean that the ADC should have a 50ohm input termination...
Just do a search on the IEEExplore website or google for "pipeline ADC" and you will find tons of references.
 

which part of 1.5bit/stage circuit should I start designing first?
 

I'd start from the OTA, followed by the MDAC (that uses the OTA) and then the comparator.
 

1- Regarding your digital, you need to design the clock generator circuit (non-overlapping clock), digital correction logic and the MDAC ( comparator + some gates + ...)

2- About literature, you can find theory in the following thesis (available in google):

(a) Design for Reliability of Low-voltage, Switched-capacitor Circuits by
Andrew Masami Abo

(b) A POWER OPTIMIZED PIPELINED ANALOG-TO-DIGITAL CONVERTER DESIGN IN DEEP SUB-MICRON CMOS TECHNOLOGY - Chang-Hyuk Cho

(c) A 10-bit 25Msps Pipeline ADC for Companding Baseband Processing in Wireless Application - Shenjie Wang
 
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