Hi,
I'm designing a SC sigma delta modulator (Fs=5MHz) with 5V supply, and I need 2 reference voltages (1.75 and 3.25V) generated into the chip. So, I think that the best way is to build a BGR (such as PTAT, razavi pg 391, fig 11.20) , and with it, generate the other voltages. Is this a good approach??? Which circuit should I use to derive the 2 required voltages??
And what kind of buffer is required after the references generated??
Please, enlight me!!
Thanks
Two methods usually adopted to generate reference voltagedivided from VDD)+Buffer, Bandgap+Buffer. The noise is the smaller the better, because this noise will not be shaped by SDM loop,unlike the quantization noise.
Two methods usually adopted to generate reference voltagedivided from VDD)+Buffer, Bandgap+Buffer. The noise is the smaller the better, because this noise will not be shaped by SDM loop,unlike the quantization noise.
1. the simple and practice method is used just a resister divider to generate the reference .. cause the common noise will be cancelled in fully differential SC ckt.
to remove any high freq. noise, external large cap. are required. usually 1uF or 0.1uF is needed.
Can you please explain, how is the noise reduced by oversampling ratio? I mean the mechanism of reference noise being reduced by OSR?
If you can point me to some reference paper, it will be great too.