reducing |VGS| of a mosfet question

If you really need to limit it, add a resistor in the "g1" connection and a 5.1V Zener diode between gate and source.

Brian.

Hello Brian , This advice made the Vgs work like a magic.
I want to understand the physics behind it.
before adding the zenner diode and resistor, there is a section below where the gate is 12V higher then the source.
When we connect the zenner 1N750 between gate and source then D3 is reversed biased with 4.7V on Vgs.
why do we need to resistor? it seems the zenner is doing all the job?
did you mean to put a resitor in series with the zenner?
Thanks.

No, the schematic is correct as you have it.
The resistor is to limit the current flowing into the Zener diode. The 1N750 is conducting when the voltage across it reaches 4.7V but the LT1716 has rail to rail outputs so if you don't fit the resistor the LT1716 will be overloaded when its output voltage becomes clamped.

C10 could also cause you problems as it will charge and discharge into the IC as the comparator outputs change. The only easy fix for that is to add a resistor (about 100 Ohms should work) in both of the IC outputs.

Brian.

Hello Brian, When i added 100ohms on the output of U1 and U2 it ruined the functionality, So i added 100 ohms in series to C10 is it a good alternative?

regarding the 1N750 zenner diode.As you can see below we have 1.8mA current flowing threw it.
Isnt it too little current for this zenner diode to function properly (having 4.7V reversed biased)?
Thanks.

I can't simulate the circuit at the moment but to be honest I'm not sure what C10 does at all. The LT1716 both drives and sinks current at its output pin so just linking two outputs together would be considered poor practice. It is rated for indefinite shorts but consider what happens if the outputs of U1 and U2 are at opposite levels, you basically short the supply through the output stages. The charge on C10 also has to dump current back into the IC if either output goes to low level. If it is intended to create a delay, the capacitors at the input should be sufficient to take care of that.

Don't worry about Zener current, they will work down to microamp currents. The voltage does vary a little with the amount of current but you don't need to worry about that here. The variation can be calculated by imagining the impedance is a series resistor then using Ohms law to add the voltage across it to the actual Zener voltage.

Brian.

I have a basic concern about this assembly, which
I take to be an inrush current limiter (by way of rail
dV/dt ramp rate).

Your turnon plot appears to take 2 seconds to
slew. That's a long time to be holding a power
MOSFET linear. I would worry about the load
/ filter bank being able to cook the channel
or neck. I think at the least, you want to qualify
the MOSFETs you picked for the Joule energy
they take, and try to figure (or better, measure)
local temp rise and deduce reliability.

Or maybe you do something like a compound
output, use big dumb power BJTs to handle the
linear interval (they are made for it, no fancy
assumptions that they are "either on or off"
embedded in the conditions) and hard-switch
the MOSFETs once the two BJTs top and bottom
have buried into saturation. Everybody working
how they like to work.