Reducing quantization noise in ADC with oversampling

hi
1- The below article explains over sampling rate is beneficial because Quantiziation noise contribution is reduced in input signal band with increasing sampling rate .
2- Dynamic element matching in flash ADC is done in which reference voltage of each comparator changes randomly with the input of next sample . It is done through random cycle of reference generator . The method reduces the errors of resistors mismatch and comparators mismatch . In this method , the disturbance in frequency domain also is distributed in frequency band and appeared as the white noise.

1) reference : Cline D.V. , " Noise, speed and power trade off in pipelined analog to digital converter " . PhD thesis , 1988 . university of california at Berkely.

explanation : I don't know the reference of (2) .
please give me more explanations about 1 and 2 especially the bold-underlined sentence or introduce a reference or article for me about it.
thanks

1. When you increase the sampling rate, instead of comparing 2 samples(100 and 150) you will have for example 5 samples(100, 105, 95, 150, 120) which when averaged give a more accurate result.

2. Dynamic matching technologies.
https://pdfs.semanticscholar.org/84c1/fde1d015938f105d3a946007907793cff9aa.pdf

Hi,

this only works when the converted samples have different values.
If the signal is stable and free of noise and you get always the same sample value ... you don´t get better overall noise.

In this case you need to add an analog dither signal. (DC free triangle for example with amplitude >= 1 LSB)

Klaus